Message from Directors
Dear Readers,
The highlights of this Newsletter edition go to Samsung, Soitec, and Lattice. Samsung will be presenting in the upcoming IEDM 2020 conference a solid-state lidar integrating all components onto a single-chip device with a 10-m range. This is a development that opens the door to low energy consumption lidar, which in turn will enable numerous future applications. Soitec discussed at the Shenzhen Global CEO Summit in early November how engineered substrates enable low power edge computing and Lattice brings innovation in the FPGA world with their low power Certus-NX portfolio. Selected works from academia point towards developments focused on sensors and optoelectronics. The semiconductor industry exhibits a strong continuous growth during the COVID-19 pandemic as discussed in the SEMI News section.
The month of December will be rich in virtual conferences. The Events section points towards a few that are worth following for the SOI Community.
Enjoy the reading, and stay safe!
Best Regards,
Carlos Mazure, Chairman & Executive Director
Jon Cheek, Executive Director
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Soitec attended ASPENCORE's Global CEO Summit to delivered a speech on the topic of "Soitec’s Engineered Substrates for EdgeComputing”.
Soitec's optimized substrate has enabled many products to run with ultra-low power consumption, while the SoC remains always-on. Today, Rockchip (瑞芯微电子) has developed a full range of AI products based on FD-SOI technology.
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IEDM highlights: A 2D lidar on a chip
Samsung researchers have advanced the concept of a solid-state lidar with the development of a single-chip device with a 10-m range. The chip was fabricated on a silicon-on-insulator wafer. For the TLD and SOAs requiring optical gain, III-V epitaxial layers were directly bonded to the pre-patterned silicon wafer and post-processed to form the photonic circuit.
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An Ultra-Low-Power B-Ph/Si HD-TFET with Enhanced Electrical Characteristics
In the simulation-based study, the layered B-Ph with moderate value of bandgap & low effective mass is used in the source-region of the SOI heterojunction dopingless HD-TFET. The investigations of device characteristics are done against the channel lengths from 45nm to 14nm.
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A new design of 1×2 optical switch with silicon waveguide and phase
change material
The optical switch was fabricated on a silicon-on-insulator (SOI) wafer with a 220-nm-thick silicon layer on the top of a 3-μm-thick buried oxide layer. The switch consisted of two waveguides system, and one of the waveguides was covered by a thin GST film.
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General-Purpose FPGAs: An Innovation-less Decade
Despite its use of already-established manufacturing techniques, FD-SOI produces smaller die sizes & is higher reliability than standard CMOS. It virtually eliminates SERs in SRAM, contributes to a mean-time between failure (MTBF) on Certus-NX devices that's more than 150x the competition.
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Strong coupling of single quantum dots with low-refractive-index/high-refractive-index materials at room temperature
Another case of a high-refractive-index material is a silicon-on-insulator material, the top SiO2 membrane thickness is h = 3 μm; the silicon membrane height is d = 250 nm; the SiO2 waveguide width is w = 1.5 μm; and the thickness of the embedded SiO2 is t = 1 μm.
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SEMI News Highlight
This SEMI blog highlights market data showing the impressive growth of the semiconductor manufacturing equipment segment worldwide during COVID-19. The pandemic has powered a digital transformation across industries ranging from education and work-from-home to healthcare, and investment momentum is expected to continue in 2021.
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User 2 User: The Mentor User Conference
Date & Time: 1 December 2020
U2U is your opportunity to learn, share, and network with fellow technical experts who design leading-edge products using Mentor tools. Dedicated to end-users of Mentor EDA solutions, this one-day virtual conference is free to attend and includes innovative keynotes from industry leaders, 10 technical sessions, as well as a chance to network with colleagues and industry peers.
Register Here
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Decadal Plan for Semiconductors: Setting the 2030 Goals
Date & Time: 2 December 2020
The current hardware-software (HW-SW) paradigm in information and communication technologies (ICT) has reached its limits and must change. It is important to identify significant trends that are driving information technology and what roadblocks/challenges the industry is facing.
Register Here
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Analyzing the Impact of the U.S. Election on the Microelectronics Industry
Date & Time: 3 December 2020
This free webinar will bring you expert analysis from the Eurasia Group on the impact of the U.S. presidential election on current geopolitical tensions and US-China trade, focusing in on the global microelectronics supply chain. A panel discussion with industry CEOs from multiple regions and segments will provide their perspectives.
Register Here
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Core Technology of RF Front End
Date & Time: 11 December 2020 - 13 December 2020
In meeting the popular demand to further explore the practicality of RF front-end, 麦姆斯咨询 has designed a Training Course: RF Front-End Core Technology, and invited experts and scholars in the field of RF front-end core technology to explore the in-depth analysis of RF front-ends in the 5G era.
Register Here
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SEMICON Japan 2020 Virtual
Date & Time: 11 December 2020 - 18 December 2020
The SEMICON Japan 2020 Virtual exhibition will include 10 pavilions spanning electronic system design, flexible hybrid electronics, MEMS, quantum computing, 5G and 6G, smart mobility, and smart workforce. The conference will feature eight online keynote presentations with English subtitles by visionaries from industry, government and academia.
Register Here
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IEDM Conference 2020
Date & Time: 12 December 2020 - 18 December 2020
The on-demand portion of the conference will begin on December 5th and will remain available through the entire conference. The live portion will begin on December 12th (PST). Please be sure to register for the conference! For more information, please check our program and registration pages.
Register Here
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